Job Description  
  
The intern will be part of a research team of Intel China Lab, developing new system solutions for Intel IA based LTE base station.
The candidate will work as LET baseband signal processing FPGA design and verification engineer assistant.
  
The candidate will work as a digital logic design and verification engineer assistant. You will be part of the INTEL IT FLEX PSV team which is developing XHCI ASICs.  
Qualifications:  
1)      Master candidate in EE or CS, who can work 4 days per week for half a year or more
2)      Experience of FPGA design/verification/debug
3)      Perl or other script language programming skill is a plus
4)      Knowledge of LTE protocol and Matlab experience is a plus
    
If you are interested in this position, pls send your resume to  zhiyuan.zhang at intel dot com with subject as "FPGA_Intern_school_major"  
  
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