【Job Title 1】 Verification Engineer
【Dept.】CPU Platform/Platform Component
【Responsibilities】
Verification和FPGA emulation协助，负责run regression,log check,FPGA checklist测试。
【Requirements】
1、在校硕士，微电子及相关专业，熟悉Verilog，了解USB或SATA协议；
2、实习时间6个月以上，每周至少工作4天。

【Job Title 2】 Verification Engineer
【Dept.】CPU Platform/South Bridge
【Requirements】
1、Master degree in Computer Science or Electrical Engineering,available for 6 months at least and four days a week;
2、Strong programming skills on Verilog HDL；
3、Good UNIX skills required；
4、Experience with FPGA implementations is preferred；
5、Excellent communication skills；
6、Team player and easy to work with.

简历接收邮箱: hrbj_6@viatech.com.cn

※ 修改:·xinera 于 Jan 20 11:19:12 2010 修改本文·[FROM: 203.86.66.*]
※ 来源:·水木社区 http://newsmth.net·[FROM: 203.86.66.*]

修改:xinera FROM 203.86.66.*
FROM 203.86.66.*