Department: Intel Labs China

Location: Beijing

Skill & Background required:
  1) Good experience of FPGA design and Test.
  2) Very familiar with Xilinx FPGA and EDA tools
  3) Very familiar with simulation tools
  4) Hardware Language(Verilog or VHDL)

General requirements:
  1) Master or Ph.D in EE or CS.
  2) Good English reading and writing skill
  3) At least 4 days (normal working time) per week for half year

If you are interested in this position, pls send your resume to meilin.zhang@intel.com directly.
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FROM 192.55.46.*