合肥产投投资的唯一一家BMS芯片厂商 团队主要来自外企
招聘 上海北京
模拟设计:电源方向
模拟设计:adcdac
数字设计
联系猎头微信361261541
Role & Responsibilities:
? Discussion of specification needs with system engineers and translating customer requirements into design requirements
? Perform conceptual studies and architecture reviews
? Creation of building-block specifications to implement transistor-level designs
? Implementation of design-for-test concepts in collaboration with test, validation, verification, and digital design engineers
? Transistor-level design of analog circuits, e.g. Amplifiers/OPAMP circuits, LDO, Buck DCDC, Boost DCDC, Charge Pump etc.
? Setup of mixed-signal testbenches to ensure block-level specifications are met
? Thorough documentation of testbench and verification results
? Lead and participate in design and specification reviews
? Monitoring and supervision of the IC layout to minimize parasitic effects
? Presentation and discussion of circuit implementation and simulation results
Requirements & Qualifications:
? Master degree with major in EE and at least 5+ years of experience
? Expertise and strong hands-on experience in transistor level analog design
? Experience and a proven track record of bringing your designs to production
? Understanding of device level operation & physics
? Knowledge of low power design and high voltage analog circuit design experience & knowledge of BCD/HV processes
? Good understanding of layout considerations for either high voltage power applications and ability to oversee the same
? Experience in analog/mixed-signal co-simulations & analog verification
? Experience in lab evaluation of initial silicon and data analysis
? Strong analytical and problem-solving skills
? Strong written and verbal communication skills
Role & Responsibilities:
? Discussion of specification needs with system engineers and translating customer requirements into design requirements
? Perform conceptual studies and architecture reviews
? Creation of building-block specifications to implement transistor-level designs
? Implementation of design-for-test concepts in collaboration with test, validation, verification, and digital design engineers
? Transistor-level design of analog circuits, e.g. Amplifiers/OPAMP circuits, ADCs/DACs, Bandgaps & Bias Circuits, Temperature Sensor, Oscillators
? Setup of mixed-signal testbenches to ensure block-level specifications are met
? Thorough documentation of testbench and verification results
? Lead and participate in design and specification reviews
? Monitoring and supervision of the IC layout to minimize parasitic effects
? Presentation and discussion of circuit implementation and simulation results
Requirements & Qualifications:
? Master degree with major in EE and at least 5+ years of experience
? Expertise and strong hands-on experience in transistor level analog design
? Experience and a proven track record of bringing your designs to production
? Understanding of device level operation & physics
? Knowledge of low power design and high voltage analog circuit design experience & knowledge of BCD/HV processes
? Good understanding of layout considerations for either high precision analog applications and ability to oversee the same
? Experience in analog/mixed-signal co-simulations & analog verification
? Experience in lab evaluation of initial silicon and data analysis
? Strong analytical and problem-solving skills
? Strong written and verbal communication skills
Role & Responsibilities:
? Contribute to the project level digital design activities:
oFull chip/block level RTL design and implementation
oDesign-for-Test implementation
oCollaborate with analog design engineers to define mixed-signal control loops, interfaces and calibration schemes
oWork with digital and mixed signal verification teams on verification plans, test cases, and analyzing test results
oModelling/simulating/debugging digital circuits
? Liaising/mentoring the physical design engineer in their implementation of the digital cores (i.e. synthesis, P&R, timing closure etc.)
? Collaborate closely with other Analog Design leads during System level definition to develop robust and efficient Digital Architectures.
? Develop digital block level specifications from System level requirements
Requirements & Qualifications:
? Master degree in EE with 5+ years relevant digital ASIC design experience
? Experience in architecting and specifying complex digital systems
? Broad experience working with digital design, implementation and verification tools
? Strong knowledge of RTL coding techniques and good design practices
? Experience in working with physical digital implementation engineers (i.e. from synthesis, P&R, scan insertion static timing analysis etc.)
? A good understanding of mixed signal system level considerations and DFT implementation
? Strong sense of responsibility to deliver project milestones to schedule
? Strong analytical and problem-solving skills
? Strong written and verbal communication skills
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