招聘：数字后端STA工程师-上海、苏州、合肥
联系人：Franky
微信：e21139072
职位信息：
1. Prior experience(3+ yrs) of handling block and chip level STA /synthesis designs
2. Candidate should have Lead at least 2-3 complex ASIC projects (2- 5Miliongates) for synthesis/STA on ASICs
3. Experience in developing constraints for synthesis/STA
4. Multi-mode, multi-corner STA experience in 40nm and lower technology nodes
5. Understanding of Sign-Off Checks
6. Strong written and verbal communication skills
7. Layout /DFT /RTL Design/LEC debug experience will be considered a plus
8. Low power design experience (UPF or CPF flow) will be considered a plus
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FROM 120.239.88.*