所有职位面向2013年毕业的同学，微电子/软件等相关专业，寒假或年后可开始实习，每周不少于3天，实习期不少于半年，实习表现优秀可转正。

感兴趣的同学请按以下格式发送简历
标题:姓名+学校+毕业年份+应聘职位+每周工作天数
如：张三丰+复旦大学+2013+ASIC Intern+每周4~5天

简历请送campus@nvidia.com

招聘职位:
1. ASIC Intern
2. GPU Architect Intern
3. VLSI Physical Design Intern


1. ASIC Intern

Location:Shanghai

Job Description:

Design,verify,debug and optimize the state-of-the-art GPU ASIC under some guidance;
Developing tools to improve work efficiency.

Requirement：

2013 graduate is preferred, MSEE;
Work at least 4 days/week;
Proactive and persistent; Strong problem solving skills; Willing to work on open ended issues;Team player;
Good communication skills. Excellent oral and verbal English.

Strong knowledge in Verilog HDL;
Experience of working in Linux/Unix environment
Hands-on programming skills in Perl, C/C++.
Experience in simulation, synthesis tools is a plus.


2. GPU Architect Intern

Location:Shanghai

Responsibilities:

- We are looking for world class engineers to design, model, analyze and verify next generations of GPU architecture.
- The candidates will work with a group of architects to design and develop proprietary internal tools for the visualization, analysis, and debug and verification of tests and applications on various functional and performance simulations of future chips.
- The candidates will have opportunities to get involved in cutting-edge GPU macro- and micro-architecture design, verification and optimization, including porting commercial applications to test benches, identifying performance hotspots and data mining for performance analysis.  

Requirements:

- Bachelor’s Degree or higher majoring in CS/EE/Mathematics or relevant fields.
- Solid computer science background
- Strong C/C++ programming ability
- Excellent English writing for engineering documentation, English oral well enough to attend meetings.
- Experience in the following areas is a plus:
- Scripting language (Perl, Python, Ruby) experience.
- 3D graphics (D3D or OpenGL) application development.
- Parallel computing/CUDA/OpenCL/HPC development.
- Microprocessor architecture design & verification.
- System level programming experience in OS, compiler, driver, tools, virtual memory system, etc.
- Multimedia (video, image processing, visualization) application development


3. VLSI Physical Design Intern

Location: Shanghai

RESPONSIBILITIES:

- Responsible for block level physical design of NVIDIA processors (including floorplan, placement, CTS, routing, timing closure, DRC/LVS and STA)
- Participating in flow automation, regression test, and flow issue debug.

MINIMUM REQUIREMENTS:

- BS majoring in CS/EE, MSEE is preferred.
- Courses taken in computing science, digital design, circuit design, device modeling or related.
- Knowledge of device model, processing technology, timing, noise and power in chip design.
- Knowledge of perl/tcl, and good programming ability. Debug experience is preferred.
- Experience on physical design implementation (any of: floorplan, Place & Route, STA, LVS/DRC) or ASIC design is preferred.
- Hand-on experience in EDA software from Synopsys (PC/ICC/DC/PT/STAR-RC), Cadence (First Encounter) or Magma (Talus) is preferred.
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FROM 203.18.50.*