NVIDIA招聘Physical Design Engineer(Intern)，有意向的同学可以发送简历到sasu@nvidia.com ,请在简历中注明一周可以实习天数以及可以开始实习的时间，欢迎大家加入NV~~

实习地点：上海
Description: Help physical design implementation and methodology team to build and maintain automation system.
RESPONSIBILITIES:
- Responsible for block level physical design of NVIDIA processors(including floorplan, placement, cts, routing, timing closure, DRC/LVS and STA)
- Participating in flow automation, regression test, and flow issue debug.

MINIMUM REQUIREMENTS:
- BS majoring in CS/EE, MSEE is preferred.
- Courses taken in computing science, digital design, circuit design, device modeling or related.
- Knowledge of device model, processing technology, timing, noise and power in chip design.
- Knowledge of perl/tcl, and good programming ability. Debug experience is preferred.
- Experience on physical design implementation(any of: floorplan, Place & Route, STA, LVS/DRC) or ASIC design is preferred.
- Hand-on experience in EDA software from Synopsys (PC/ICC/DC/PT/STAR-RC), Cadence (First Encounter) or Magma (Talus) is preferred.
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FROM 203.18.50.*