申请地址：http://my.ericssoncampus.com/JobDetail.aspx?j=765&t=11?bbs2013
工作类型： 实习         工作地点： 北京
薪资待遇： 面议         招聘人数： 1
所属部门： 中国研发总院     更新日期： 2013-08-09

Job Objective:
Have responsibility for pre-layout and post-layout SI & PI analysis and document PCB layout constraints and SI reports for PCB layout and FPGA logic design. Co-work with other SI engineers and manager, leverage designs from other SI engineers and share in learning of new knowledge within SI team.

Responsibilities:
- Perform SI/PI lab measurements and correlate simulations with measurements.
- Deliver SI/verification reports on time with high quality.
- Parallel buses timing and signal quality analysis.
- PDN DC drop and AC analysis. Providing design guidelines on decoupling capacitors selection & placement and power plane optimization.
- High speed serial interconnects characterization, optimization and correlation.

Qualifications & Requirements:
- Bachelor degree or above of first level university.
- Knowledge on transmission line theory, electromagnetic field theory and time & frequency domain analysis.
- Experiences with major SI/PI tools: Cadence Allegro, Hyperlynx, SiSoft, Sigrity, ADS, HFSS, CST and other tools.
- Lab measurement experience with oscilloscopes, spectrum analyzers and VNAs is a plus.
- Initiative, curious and positive with excellent written and oral communication skills.
- 4 days/week working is a must.
- At least working for 6 months.
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