Job Title: Intel IT Flex PSV Team Intern
Work Location: Beijing (1) / Shanghai (1)
Job Description:
The candidate will work as a digital logic design and verification engineer assistant. You will be part of the INTEL IT FLEX PSV team which is developing XHCI ASICs.
Qualification:
You should be a postgraduate student and graduate in year 2014. You should currently be pursuing a relevant educational qualification and have knowledge and/or competency in at least one of the following areas
-Proficient in UNIX/Linux and script language (Shell, Perl and etc)
-Proficient in regular expression
-Solid understanding of digital electronics, logic design and verification is a plus
-Experience with a hardware description language (VHDL or Verilog* and/or System Verilog*) is a plus
-Experience with a high-level verification language (System Verilog* preferred) is a plus
-Experience with test scripts and software to complete automated testing and characterization is a plus
-Knowledge of interfaces such as PCI, PCI Express, USB, 1394, ATA is a plus
-Excellent communication, interpersonal and problem solving skills
-Motivated, self-directed and able to work effectively both independently and in a team
Send resume to Email: (Please told us the location you accept in your email's subject)
young.gao@intel.com
急招，要求在编程和脚本方面有较强的能力，最好是2015年毕业的研究生。
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FROM 192.102.204.*