AMD研发中心招募DFT Intern
要求六个月以上，请发送简历至Ciela.Wang@amd.com
标题应聘职位-学校-姓名-专业-毕业时间-可持续时长-一周几天

Description:
1. Participate in DFT implement, including SCAN, Boundary SCAN, and MBIST

2. Generate DFT related timing constraints and work with PD team for timing cl
osure

3. Generate and verify DFT structural patterns and functional patterns

4. Participate in ATE bring-up and debug the DFT patterns on ATE              
                          
Requirements/Qualifications:  

-   Major in EE or CS preferred  

-   Familiar with ASIC design flow  

-   Familiar with Unix/Linux and script(tcl, perl etc.)  

-   Good English hearing, speaking, reading and writing capabilities  

-   Good communication skills  

-   Familiar with DFT is a big plus
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FROM 210.13.97.*