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岗位职责
1. Adopt most advanced flow and methodology to do DFT(Design for test) implementation for  subsystem level
2. DFT verification for chip level or subsystem level, include DFT DRC(design rule check), ATPG and scan pattern pre and post simulation.
任职要求
1. ASIC design basic knowledge, DFT basic knowledge is a plus
2. Knowledge on utility like perl, Makefile, tcl is a plus
3. Interest on DFT, will to study advanced DFT solution
4. Strong and continuous learning capability, good problem-solving capabilities.
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简历投递：jobs.bj@mediatek.com  
（请在邮件标题注明：姓名+申请职位+学校+专业+学历+招聘启事网站 ）
实习时间：每周保证至少4个工作日，连续三个月及以上
工作地点：北京朝阳区酒仙桥路六号院1号楼B区（798西门）,公司有班车
#  研二同学优先，实习表现优异者有机会直接拿到2019校招offer。
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