Logic Verification Engineer（logic2&4）（实习）

【招聘人数】：2人

【简历接收信箱】hrbj_6@viatech.com.cn

【Responsibilities】

VT3419 RTL and Post verification.

【Requirements】

1. M.S/B.S in Computer Science or Electrical Engineering

2. Digital design or verification experience in IC or FPGA

3. Available for at least nine months and four days a week.

4. Graduate students who will graduate in 2010 are preferred.
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FROM 203.86.66.*