Location: Raycom site, Intel Labs China, Beijing

Qualifications:
-Master or Ph.D candidate in EE or CS, who can work at least 4 days
per week for one year or more
-Good experience of FPGA design/verification/debug
-Very familiar with Xilinx FPGA and EDA/simulation tools
-Hardware Language(Verilog or VHDL)
-Knowledge of PCI,PCIe is a plus (optional)
-Perl or other script language programming skill is a plus
(optional)
-Good team player, self-motivation

If you have interest, pls send resume to vince.wang@intel.com with
title below：

"ILC_intern_name_school_time2graduate"


※ 修改:·caby 于 Mar  6 13:51:52 2011 修改本文·[FROM: 192.102.204.*]
※ 来源:·水木社区 http://newsmth.net·[FROM: 192.102.204.*]

修改:caby FROM 192.102.204.*
FROM 192.102.204.*