Job Description:
For Embedded System Research Lab, we are looking for a Masters or Ph.D intern candidate capable of undertaking challenging assignments in the area of system hardware design.
The position requires sound knowledge and experience on hardware board level design and debug, as well as integration and test along with good understanding of high speed IO protocols.
The candidate will be responsible for:
i) High speed hardware board design, familiar with Cadence EDA tool;
ii) Test and debug the real system;
iii) RTL coding capability is a plus for system debug.
Should be a self-motivated researcher with good communication skills in both Chinese and English and capable of team working.
Should have time for more than 6month time for full time intern work, at least 3-5 days a week.
Pls contact xiaoyan.dang@intel.com if you have interests.
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FROM 192.55.46.*