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手上有数十家IC设计公司的职位， 职位包括不限于IC架构/ 数字设计/ 模拟设计/ 数字验证 /芯片验证 /后端 等等各类IC职位
地点包括各大一二线城市
字数受限 , 不一一罗列，欢迎问询/联络
薪资看经验、面试、职位等因素而定,暂无实习岗位（需要2年以上经验）
部分职位：
苏州、重庆、
模拟IC设计工程师
职位说明：
1、负责传感器读出电路的设计，包括电路设计、仿真、测试、调试及改进；
2、根据客户需要定义系统需求、产品规格；
3、指导项目开发；
4、在电路设计、测试、调试中起主导作用；
5、协助版图工程师完成相关工作。
任职要求：
1、微电子及其相关专业，本科以上学历；在模拟电路设计领域有1年以上工作经验；
2、adc/dac,电源管理，时钟产生，接口，RFIC等方向均有需求；
3、良好的英语读写能力，自驱力强，善于沟通，注重团队协作。
西安 模拟IC设计工程师
职位说明：
1、独立开发有难度的模拟电路，包括电路设计、仿真、测试、调试及改进；
2、根据客户需要定义系统需求、产品规格；
3、指导项目开发；
4、在电路设计、测试、调试中起主导作用；
5、指导版图工程师完成相关工作；
6、对客户、AE、销售提供技术支持。
任职要求：
1、微电子及其相关专业，硕士以上学历；在模拟电路设计领域有3年以上工作经验；
2、熟悉bandgap，LDO，OSC，PLL等基本的模拟电路开发；
3、有SerDes领域设计经验，包括但不限于CDR、TX、RX、FFE、CTLE等电路开发经验；
4、有视频接口类PHY的开发经验，包括但不限于LVDS、HDMI、DP等；
5、有PMU领域开发经验，包括但不限于DCDC/charger/LDO等；
6、具有GPIO电路的设计经验，对whole chip ESD能力有深入的理解；
苏州珠海上海 模拟设计专家
工作职责：
1、负责完成模拟IP的架构设计及规格制定
2、负责完成相关模拟IP模块的建模、设计、仿真、验证和调试工作
3、负责模拟IP模块的关键技术攻关与技术竞争力分析
4、指导完成模拟IP的设计验证、版图规划、系统集成及测试方案等
5、撰写详细的设计文档
岗位要求：
1、微电子及电子类相关专业，本科及以上学历
2、八年以上（硕士）、十年以上（本科）模拟、混合信号 IP 设计经验，熟悉先进工艺下的高速IP设计，至少精通MIPI D-PHY，M-PHY，PCIE，DDR，USB，HDMI，Serdes，PLL等某一个领域
3、熟悉先进工艺节点的芯片设计及开发流程
4、有系统建模能力，有模拟IP行为级建模经验优先
苏州珠海 上海 模拟设计工程师
工作要求：
1、参与模拟IP的电路设计、仿真、验证和调试工作，包括Serdes，MIPI，USB，DDR，PCIE，LVDS，HDMI PHY等
2、负责模拟IP的版图规划，和版图设计团队合作完成相关版图工作
3、协助芯片测试团队制定测试方案，完成模拟IP相关的测试与验证工作
4、协助完成模拟IP在SOC芯片中的集成、验证及后端物理设计
5、撰写详细的设计文档
岗位职责：
1、微电子及电子类相关专业，硕士及以上学历
2、二年以上模拟、混合信号 IP 设计经验，熟悉先进工艺节点（FinFET）的高速IP设计，有PCIE，DDR，USB，Serdes等设计开发经验者优先考虑
3、熟悉模拟芯片设计流程及相关EDA工具使用，熟悉模拟芯片版图
4、具备使用实验室基本测试设备进行测试并Debug能力
上海,苏州，合肥，成都
Analog IP，Senior Analog Design Engineer（3HC）
ShanghAI
Suzhou
Hefei
1. Will work on the following analog IPs but notlimit to: ADC/DAC, LDO/DCDC, POR, BOR, Band-gap, various amplifiers, PLL/DLLand high speed interface design
2. Be responsible for schematic capture,simulation, test plan, DK generation and bench verification/characterizations.
3. Escort and instruct layout designers tocomplete physical implementations
4. Ensure database integrity before any release.
5. Execute any project assignment in the timingmanner.
6. Follow company’s quality standards during anyproject execution
1. At least 3 or more years of analog circuitdesign experience with MS in EE or Physics (more senior levels will also beconsidered)
2. Willing to work as an active team player withgroup’s goal in mind.
3. Familiar with SPICE simulations includingMonte-Carlo analysis.
4. Strong knowledge in physical layout andcomponent’s parasitic effects.
5. Knowledge with process and device physics is aplus.
6. Acceptable communication skill in written andspoken English.
资深模拟芯片设计工程师 上海 合肥
职位详情
Performance Objectives
1.Definition, modeling, design, and verification of highly integrated power-management ICs such as DCDC converters, LED drivers, linear regulators, and other types of analog/mixed-signal asics.
2.Ability to work at any level of the design is absolutely essential.
3.Implement full-featured behavioral models of complex analog/mixed-signal ICs.
4.Interface with test, product, and applications engineering to drive the design to a successful production release.
5.Provide technical leadership including mentoring less senior members of design team, contract design resources, and layout supervision.
6.Assist in silicon validation and lead troubleshooting efforts to root out unintended circuit behavior through simulation, FIB, and intensive laboratory debugging.
7.Close collaboration with product definition and system architecture groups.
Requirements
1.BS with 5+ years or MS/PhD with 3+ years of analog mixed-signal design experience preferably in the power-management application area.
2.5+ years of analog, mixed-signal IC design experience encompassing diverse areas such as: DC-DC conversion: switch-mode or linear regulators ADC/DAC PLL/CDR Continuous and discrete-time analog integrated filters I/O interfaces Analog test (DFT) interfaces
3.Proven track record of technical leadership including multiple products taken from specification through design, release, volume manufacturing, and field support.
4.Detailed knowledge of power conversion architectures and analytical methods highly desirable.
5.System modeling skills in SIMPLIS or Matlab highly desirable.
6.CAD tools: Must be familiar with Cadence virtuoso CAD tool suite: schematic, layout, simulation and verification. Must be experienced with top-down analog behavioral modeling methodology including fluent use of verilog-A/AMS as appropriate. Skill in design automation tools and scripting environments is essential. Familiarity with Verilog and digital design and verification is a plus.
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