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北京大厂 架构职位（多个方向，具体JD见重点分割线下） 薪水可以open
1、Senior System on Chip(SoC) Architect
2、Senior Modem Power and Optimization Architect（低功耗）
3、Senior Memory and Storage Architect
4、soc架构（全芯片或者各类子系统）[/b]
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Title: Senior System on Chip(SoC) Architect
Job Description
Working as SoC Hardware architecture end-to-end lifecycle ownership
Drive Architecture/Software/Hardware co-design and collaboration on features set
Perform Power, Performance and Area modeling or analysis and track through design
Chip and hardware specification writing
Review specifications and verification plans in ASIC, software and platform to ensure requirements are followed
Industry standards tracking & 3rd party IP technical evaluation
Cooperate with internal teams to solve technical issues for quality.
Support HW/SW bring-up and debug
Patenting novel parts of system architecture
Job Requirements
MS or PhD degree in computer or electrical engineering
At least 8 years of architecture, design experience
Good understanding in SoC architecture definition - Clocks, Resets, Interconnects, Boot, Power Management, Security, System Performance, High speed IO technologies, (USB, PCIE, etc), ARM CPU.
Good knowledge of SoC design, integration, implementation and verification
Comfortable communicating and solving issues at all levels of architecture definition from micro-architecture to system level to software architecture.
Excellent analytical, written, and verbal interpersonal skills and ability to work as part of a team.
Additional Requirements
Excellent understanding of Cellular networks and 2G, 3G, LTE and 5G technology
Good understanding of related algorithms, SW and RF HW
职位描述
作为芯片硬件架构师对芯片设计的全生命周期负责
驱动系统/软件/硬件的协同设计
执行功耗、性能、面积的性能建模和分析并跟踪设计
芯片及硬件规格书编写
审查ASIC，软件和平台中的规范和验证计划，以确保符合要求
行业标准跟踪和第三方IP技术评估
与内部团队合作高质量的解决技术问题。
支持硬件/软件启动和调试
为系统架构的新颖部分申请专利
工作要求
计算机或电气工程硕士或博士学位
至少8年的芯片开发或架构工作经验
对芯片架构定义有很好的了解，包括但不限于-时钟，复位，总线，启动，电源管理，安全性，系统性能，IO高速接口技术（USB, PCIE等），ARM CPU
熟悉芯片设计，集成，实施和验证
在架构定义的各个级别（从微架构到系统级别再到软件架构）进行沟通和解决问题
出色的分析，书面和口头人际交往能力以及团队合作能力
加分项
对蜂窝网络以及2G，3G，LTE和5G技术有深入的了解
熟悉相关算法，软件和射频硬件
Title: Senior Modem Power and Optimization Architect
Job Description
Drive the SoC and system low power and optimization for very power efficient chipset
Work as architects to define use-cases to simulate
Provide power projection for the projects based on analysis
Create test cases within the design verification team's environment
Work with ASIC team to determine the correct functionality or enhance functionality for power reduction
Work with other architectures and design team to model the SoC power for use cases
Develop IP power model on new architecture design, providing power data for performance/power/area trade-offs
Work with multi-functional teams on improving power modeling
职位描述
驱动无线基带和系统低功耗设计的建立和优化
与架构师合作定义用例以进行仿真
根据分析为项目提供功率预测
在设计验证团队的环境中创建测试用例
与ASIC团队合作确定正确的功能定义以降低功耗
与架构和设计团队合作，为测试用例构建芯片功耗模型
在新的体系结构设计上开发IP功耗模型，为功耗、性能、面积权衡提供功耗数据
与各个职能团队合作改善功耗模型
Job Requirements
7+ years of industry experience in SoC power optimization
Experience in low power architecture.
Experience in power simulation, modeling and analysis
Experience with silicon power measurement and debug
Strong communication skills are a pre-requisite since you will collaborate with a lot of different groups
Additional Requirements
Excellent understanding of Cellular networks and 2G, 3G, LTE and 5G technology
Good understanding of related algorithms, SW and RF HW
工作要求
在芯片功耗优化方面具有7年以上行业经验
在低功耗架构，低功耗的ASIC设计实现以及ASIC物理设计方法方面的经验
具有芯片功耗仿真和建模，硬件功率仿真和分析流程方面的经验
具有芯片功耗测量和调试的经验
必须具备强大的沟通能力，因为您将与许多不同的团队合作
加分项
对蜂窝网络以及2G，3G，LTE和5G技术有深入的了解
熟悉相关算法，软件和射频硬件
Title: Senior Memory and Storage Architect
Job Description
Work with the multi-functional teams to develop architectural solutions
Perform feasibility analysis including power, thermal and system bandwidth/throughput estimates
Perform HW characterization measurements of various performance and power aspects of memory subsystems to help drive and validate architectural studies
Perform detailed architectural modeling evaluations of memory devices and sub-systems
Technical focal point for software, board design, Chip and validation teams
Authoring architectural specification in collaboration with engineers across different disciplines
职位描述
与不同领域团队合作开发架构解决方案
进行可行性分析，包括功率，热能和系统带宽/吞吐量估算
对内存子系统的各种性能和功耗方面进行硬件评估，推动和验证架构方案确立
存储设备和子系统进行详细的架构建模评估
软件，硬件电路板设计，芯片和验证团队的技术联络点
与不同领域的工程师合作编写架构文档
Job Requirements
Strong knowledge of DRAM device specifications, architectures, and circuit technique
Strong knowledge of memory controller and PHY architectures and circuits and related performance and power trade-offs
Deep understanding of memory access patterns and usage of system caches for one of the following SoC components: CPU, HW accelerators
Demonstrated ability to perform architectural modeling evaluations of memory systems
Excellent C/C++/scripting coding, debug, and testing skills
Experience in NAND and storage products
Strong communication, documentation and presentation skills with ability to clearly articulate conclusions
Additional Requirements
Excellent understanding of Cellular networks and 2G, 3G, LTE and 5G technology
Good understanding of related algorithms, SW and RF HW
工作要求
对DRAM器件规格，架构和电路技术有深入的了解
对存储器控制器，PHY架构和电路以及相关性能和功率折衷有很深的了解
深入了解SoC组件中的内存访问模式和系统缓存的使用：CPU，硬件加速器
具有执行存储系统架构建模评估的能力
出色的C /C++/ 脚本编写，调试和测试技能
NAND和存储产品方面的经验
较强的沟通,文档撰写和表达能力，能够清楚地表达结论
加分项
对蜂窝网络以及2G，3G，LTE和5G技术有深入的了解
熟悉相关算法，软件和射频硬件
芯片架构师
岗位职责
1) 负责AI芯片和通用处理器或者细分领域的需求分析，主导AI，处理器芯片架构设计，竞争分析和规格定义；
2) 负责芯片领域的技术演进路标、关键技术，主导关键技术和架构的研究；
3) 负责大型芯片的架构设计，关键模块的把控和设计。
岗位要求
1) 熟悉从AI芯片和通用处理器架构与电路设计，设计公司一线技术专家优先考虑；
2) 有大型芯片的架构设计和关键模块的把控和设计的项目经验；
3) 对基于SOC构建的系统整机设计，基于SOC的软硬件划分，有较深刻认识，具备一定软硬件功底；
4) 熟练把控和应用关键IP(PCIe,DDR/GDDR，NoC)；
职位需求：AI,通用处理器或者细分领域的需求分析，主导AI，处理器芯片架构设计，竞争分析和规格定义；
熟练把控和应用关键IP(PCIe,DDR/GDDR，NoC)； 这个是需要一位主架构师，需要SOC和IP核都要懂的
在一个IP子系统领域很精通的人（PCIe,DDR/GDDR，NoC，GPU, cache 处理器设计方向的技术cache一致性设计的人，复杂层次化总线的人，lowpower，) 这块架构也需要的
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