Job Title
IP AE: PCIe, DDR, Ethernet and SERDES IP
EDA AE: Synthesis, PR and STA
IP Design: Digital Design, Design Verification
R&D: C/C++,data structures, Algorithm
Others: DFT, FPGA, Analog, Layout
Location:
Shanghai/Beijing/Wuhan/ShenZhen
Contact
内推方式是员工上传简历
51633508 (可加微信，备注内推)

急招PCIe IP, Ethernet IP, HBI/HBM/DDR IP,Interface IP和Foundation IP方向AE，工作地点上海/北京/深圳/武汉
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修改:ViChen96 FROM 120.228.68.*
FROM 120.228.70.*