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[申请] smartboy2004 申请 FPGATech/可编程器件技术版正式版主(0)
2008-05-10 smartboy2004|2008-05-10 smartboy2004
这个图是什么意思？(1)
2008-05-09 ringbird|2008-05-09 chenpp
AS模式下载显示成功，但是没反应……(5)
2008-05-09 purpleshade|2008-05-09 purpleshade
求FPGA开发板！！！！(2)
2008-05-07 sswz|2008-05-09 sswz
这两种实现方式有何区别？(1)
2008-05-09 coconuts2000|2008-05-09 chenpp
关于if条件嵌套！(12)
2008-05-07 shangzz|2008-05-09 mimosaxixi
always里的for循环是在一个时钟周期内完成的吗(3)
2008-05-08 Boge|2008-05-09 feitengyu
后仿的错误(1)
2008-05-02 vernaltom|2008-05-08 geniisun
请问megawizard中生成ip core的问题(1)
2008-05-07 Boge|2008-05-08 geniisun
请问一个verilog的综合问题(6)
2008-05-06 Boge|2008-05-08 HeXieHao
设计方案推荐(0)
2008-05-08 aprilwgp|2008-05-08 aprilwgp
时钟生成模块应该如何写才算符合正规要求呢？(11)
2008-05-06 feitengyu|2008-05-08 feitengyu
求助DSP的问题(2)
2008-05-07 BESSA|2008-05-08 BESSA
quartus里怎么选择是生成SOF还是POF？(1)
2008-05-07 Boge|2008-05-08 BESSA
有用FPGA做路由器的吗？(1)
2008-05-08 LEOWIND|2008-05-08 encrypt
Where to get a detailed datasheet of FPGA(0)
2008-05-08 SmilingHeart|2008-05-08 SmilingHeart
很神奇啊(3)
2008-05-07 tjromaprince|2008-05-07 tjromaprince
[help] Vector-Matrix Multiplier using FPGA(0)
2008-05-07 SmilingHeart|2008-05-07 SmilingHeart
问个VHDL的问题(1)
2008-05-07 yjyzdk|2008-05-07 tjromaprince
有源晶振分不分商业级和工业级(1)
2008-05-07 WMDa|2008-05-07 tjromaprince
verilog 中的 inout 端口(0)
2008-05-07 linuxfans|2008-05-07 linuxfans
请问matlab语言/c/c++怎么转换成VHDL语言(10)
2008-05-06 bleuleaf|2008-05-07 frankrick
谁有个好的modelsim教程吗，传我吧，谢谢(0)
2008-05-07 federalgerma|2008-05-07 federalgerma
求教：布斯booth乘法器的运算次数……(0)
2008-05-07 kapo|2008-05-07 kapo
关于门延迟(4)
2008-05-04 geniisun|2008-05-07 geniisun
大侠们帮忙看一下程序吧(5)
2008-05-06 tjromaprince|2008-05-06 tjromaprince
JTAG认错芯片怎么办?(3)
2008-05-06 heartfield|2008-05-06 jiu
牛人推荐个modelsim的好书吧(1)
2008-05-06 federalgerma|2008-05-06 MSquare
xilinx的EDK是不是只能用XST综合？(0)
2008-05-06 wjie|2008-05-06 wjie
maxplusII仿真通过后怎么看用了多少单元？(2)
2008-05-06 zllzjm|2008-05-06 BESSA